移植流程

移植前需要安装Keil.STM32G0xx_DFP.1.2.0.pack组件，大致的移植过程：

1. CubeMX配置
2. RT-Thread组件配置
3. 工程模板配置

参考例程配置：拷贝仓库原有的stm32g070-st-nucleo工程，然后另起一个名字，目录结构如下

完整的RT-Thread BSP需要考虑的改动点：

1. 文档：把两个README文档改一下，改成stm32g030相关的说明
2. 芯片：board目录下是跟stm32g030相关的CubeMX配置、链接脚本、板级初始化文件
3. MDK5：template工程是命令scons --target=mdk5生成工程的模板
4. 系统：.config文件保存RT-Thread系统的基本组件配置，rtconfig.h与之关联

CubeMX配置

时钟配置

在Caegories栏点击System Core一栏，然后选择RCC，实际上HSE和LSE也可以不用配置，因为stm32已经集成了晶振，在GPIO资源紧张时可以不配置

这里选择不配置时钟，Clock Configuration配置如下：

系统滴答

点击SYS项，配置如下图所示

串口配置

在Connectivity栏点击USART1项，配置PB6、PB7两个GPIO，设置波特率等串口参数

工程配置

Project Manager配置项参考

Code Generator配置，最后点击右上角GENERATE CODE

组件配置

先说结论，一个成功移植了GPIO和USART的系统工程大致是这样的：

Kconfig

mainmenu "RT-Thread Configuration"BSP_DIR := .RTT_DIR := ../../..PKGS_DIR := packagesconfig SOC_STM32G030RBboolselect SOC_SERIES_STM32G0select RT_USING_COMPONENTS_INITselect RT_USING_USER_MAINdefault yconfig BOARD_STM32G030_TINY_BOARDboolselect BOARD_SERIES_STM32_NUCLEO_64default ysource "$(RTT_DIR)/Kconfig"
osource "$PKGS_DIR/Kconfig"
rsource "../libraries/Kconfig"if !RT_USING_NANO
rsource "board/Kconfig"
endif

board/Kconfig

menu "Hardware Drivers Config"menu "Onboard Peripheral Drivers"endmenumenu "On-chip Peripheral Drivers"config BSP_USING_GPIObool "Enable GPIO"select RT_USING_PINdefault ymenuconfig BSP_USING_UARTbool "Enable UART1"default yselect RT_USING_SERIALif BSP_USING_UARTconfig BSP_STM32_UART_V1_TX_TIMEOUTint "UART TX timeout"default 2000depends on RT_USING_SERIAL_V1config BSP_USING_UART1bool "Enable UART1"default yendifsource "$(BSP_DIR)/../libraries/HAL_Drivers/drivers/Kconfig"endmenumenu "Board extended module Drivers"endmenuendmenu

board/SConscript

import os
import rtconfig
from building import *Import('SDK_LIB')cwd = GetCurrentDir()# add general drivers
src = Split('''
board.c
CubeMX_Config/Src/stm32g0xx_hal_msp.c
''')path =  [cwd]
path += [cwd + '/CubeMX_Config/Inc']startup_path_prefix = SDK_LIBif rtconfig.PLATFORM in ['gcc']:src += [startup_path_prefix + '/STM32G0xx_HAL/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/startup_stm32g030xx.s']
elif rtconfig.PLATFORM in ['armcc', 'armclang']:src += [startup_path_prefix + '/STM32G0xx_HAL/CMSIS/Device/ST/STM32G0xx/Source/Templates/arm/startup_stm32g030xx.s']
elif rtconfig.PLATFORM in ['iccarm']:src += [startup_path_prefix + '/STM32G0xx_HAL/CMSIS/Device/ST/STM32G0xx/Source/Templates/iar/startup_stm32g030xx.s']CPPDEFINES = ['STM32G030xx']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')

board/board.h

/** Copyright (c) 2006-2025 RT-Thread Development Team** SPDX-License-Identifier: Apache-2.0** Change Logs:* Date           Author       Notes* 2018-11-5      SummerGift   first version*/#ifndef __BOARD_H__
#define __BOARD_H__#include <rtthread.h>
#include <stm32g0xx.h>
#include "drv_common.h"
#include "drv_gpio.h"#ifdef __cplusplus
extern "C" {
#endif#define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
#define STM32_FLASH_SIZE             (64 * 1024)
#define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
#define STM32_SRAM_SIZE      8
#define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)#if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN      (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN      ((void *)&__bss_end)
#endif#define HEAP_END        STM32_SRAM_ENDvoid SystemClock_Config(void);#ifdef __cplusplus
}
#endif#endif /* __BOARD_H__ */

board/board.c

/** Copyright (c) 2006-2025 RT-Thread Development Team** SPDX-License-Identifier: Apache-2.0** Change Logs:* Date           Author       Notes* 2018-12-21     zylx         first version*/#include "board.h"void SystemClock_Config(void)
{RCC_OscInitTypeDef RCC_OscInitStruct = {0};RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};/** Configure the main internal regulator output voltage*/HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);/** Initializes the RCC Oscillators according to the specified parameters* in the RCC_OscInitTypeDef structure.*/RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;RCC_OscInitStruct.HSIState = RCC_HSI_ON;RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK){Error_Handler();}/** Initializes the CPU, AHB and APB buses clocks*/RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK){Error_Handler();}
}

board/linker_scipts/link.icf

/** linker script for STM32F10x with GNU ld*//* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{ROM (rx) : ORIGIN = 0x08000000, LENGTH = 64k /* 64KB flash */RAM (rw) : ORIGIN = 0x20000000, LENGTH =  8k /* 8K sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x400;SECTIONS
{.text :{. = ALIGN(4);_stext = .;KEEP(*(.isr_vector))            /* Startup code */. = ALIGN(4);*(.text)                        /* remaining code */*(.text.*)                      /* remaining code */*(.rodata)                      /* read-only data (constants) */*(.rodata*)*(.glue_7)*(.glue_7t)*(.gnu.linkonce.t*)/* section information for finsh shell */. = ALIGN(4);__fsymtab_start = .;KEEP(*(FSymTab))__fsymtab_end = .;. = ALIGN(4);__vsymtab_start = .;KEEP(*(VSymTab))__vsymtab_end = .;/* section information for initial. */. = ALIGN(4);__rt_init_start = .;KEEP(*(SORT(.rti_fn*)))__rt_init_end = .;. = ALIGN(4);PROVIDE(__ctors_start__ = .);KEEP (*(SORT(.init_array.*)))KEEP (*(.init_array))PROVIDE(__ctors_end__ = .);. = ALIGN(4);_etext = .;} > ROM = 0/* .ARM.exidx is sorted, so has to go in its own output section.  */__exidx_start = .;.ARM.exidx :{*(.ARM.exidx* .gnu.linkonce.armexidx.*)/* This is used by the startup in order to initialize the .data secion */_sidata = .;} > ROM__exidx_end = .;/* .data section which is used for initialized data */.data : AT (_sidata){. = ALIGN(4);/* This is used by the startup in order to initialize the .data secion */_sdata = . ;*(.data)*(.data.*)*(.gnu.linkonce.d*)PROVIDE(__dtors_start__ = .);KEEP(*(SORT(.dtors.*)))KEEP(*(.dtors))PROVIDE(__dtors_end__ = .);. = ALIGN(4);/* This is used by the startup in order to initialize the .data secion */_edata = . ;} >RAM.stack :{. = ALIGN(4);_sstack = .;. = . + _system_stack_size;. = ALIGN(4);_estack = .;} >RAM__bss_start = .;.bss :{. = ALIGN(4);/* This is used by the startup in order to initialize the .bss secion */_sbss = .;*(.bss)*(.bss.*)*(COMMON). = ALIGN(4);/* This is used by the startup in order to initialize the .bss secion */_ebss = . ;*(.bss.init)} > RAM__bss_end = .;_end = .;/* Stabs debugging sections.  */.stab          0 : { *(.stab) }.stabstr       0 : { *(.stabstr) }.stab.excl     0 : { *(.stab.excl) }.stab.exclstr  0 : { *(.stab.exclstr) }.stab.index    0 : { *(.stab.index) }.stab.indexstr 0 : { *(.stab.indexstr) }.comment       0 : { *(.comment) }/* DWARF debug sections.* Symbols in the DWARF debugging sections are relative to the beginning* of the section so we begin them at 0.  *//* DWARF 1 */.debug          0 : { *(.debug) }.line           0 : { *(.line) }/* GNU DWARF 1 extensions */.debug_srcinfo  0 : { *(.debug_srcinfo) }.debug_sfnames  0 : { *(.debug_sfnames) }/* DWARF 1.1 and DWARF 2 */.debug_aranges  0 : { *(.debug_aranges) }.debug_pubnames 0 : { *(.debug_pubnames) }/* DWARF 2 */.debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }.debug_abbrev   0 : { *(.debug_abbrev) }.debug_line     0 : { *(.debug_line) }.debug_frame    0 : { *(.debug_frame) }.debug_str      0 : { *(.debug_str) }.debug_loc      0 : { *(.debug_loc) }.debug_macinfo  0 : { *(.debug_macinfo) }/* SGI/MIPS DWARF 2 extensions */.debug_weaknames 0 : { *(.debug_weaknames) }.debug_funcnames 0 : { *(.debug_funcnames) }.debug_typenames 0 : { *(.debug_typenames) }.debug_varnames  0 : { *(.debug_varnames) }
}

board/linker_scipts/link.sct，这个是MDK的链接脚本文件，需要加上rti_fn保证RT-Thread组件的初始化

; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************LR_IROM1 0x08000000 0x00010000  {    ; load region size_regionER_IROM1 0x08000000 0x00010000  {  ; load address = execution address*.o (RESET, +First)*(InRoot$$Sections).ANY (+RO)}RW_IRAM1 0x20000000 0x00002000  {  ; RW data.ANY (+RW +ZI)}
}

board/linker_scripts/link.lds，这个是arm gcc的链接脚本

/** linker script for STM32F10x with GNU ld*//* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{ROM (rx) : ORIGIN = 0x08000000, LENGTH = 64k /* 128KB flash */RAM (rw) : ORIGIN = 0x20000000, LENGTH =  8k /* 8K sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x400;SECTIONS
{.text :{. = ALIGN(4);_stext = .;KEEP(*(.isr_vector))            /* Startup code */. = ALIGN(4);*(.text)                        /* remaining code */*(.text.*)                      /* remaining code */*(.rodata)                      /* read-only data (constants) */*(.rodata*)*(.glue_7)*(.glue_7t)*(.gnu.linkonce.t*)/* section information for finsh shell */. = ALIGN(4);__fsymtab_start = .;KEEP(*(FSymTab))__fsymtab_end = .;. = ALIGN(4);__vsymtab_start = .;KEEP(*(VSymTab))__vsymtab_end = .;/* section information for initial. */. = ALIGN(4);__rt_init_start = .;KEEP(*(SORT(.rti_fn*)))__rt_init_end = .;. = ALIGN(4);PROVIDE(__ctors_start__ = .);KEEP (*(SORT(.init_array.*)))KEEP (*(.init_array))PROVIDE(__ctors_end__ = .);. = ALIGN(4);_etext = .;} > ROM = 0/* .ARM.exidx is sorted, so has to go in its own output section.  */__exidx_start = .;.ARM.exidx :{*(.ARM.exidx* .gnu.linkonce.armexidx.*)/* This is used by the startup in order to initialize the .data secion */_sidata = .;} > ROM__exidx_end = .;/* .data section which is used for initialized data */.data : AT (_sidata){. = ALIGN(4);/* This is used by the startup in order to initialize the .data secion */_sdata = . ;*(.data)*(.data.*)*(.gnu.linkonce.d*)PROVIDE(__dtors_start__ = .);KEEP(*(SORT(.dtors.*)))KEEP(*(.dtors))PROVIDE(__dtors_end__ = .);. = ALIGN(4);/* This is used by the startup in order to initialize the .data secion */_edata = . ;} >RAM.stack :{. = ALIGN(4);_sstack = .;. = . + _system_stack_size;. = ALIGN(4);_estack = .;} >RAM__bss_start = .;.bss :{. = ALIGN(4);/* This is used by the startup in order to initialize the .bss secion */_sbss = .;*(.bss)*(.bss.*)*(COMMON). = ALIGN(4);/* This is used by the startup in order to initialize the .bss secion */_ebss = . ;*(.bss.init)} > RAM__bss_end = .;_end = .;/* Stabs debugging sections.  */.stab          0 : { *(.stab) }.stabstr       0 : { *(.stabstr) }.stab.excl     0 : { *(.stab.excl) }.stab.exclstr  0 : { *(.stab.exclstr) }.stab.index    0 : { *(.stab.index) }.stab.indexstr 0 : { *(.stab.indexstr) }.comment       0 : { *(.comment) }/* DWARF debug sections.* Symbols in the DWARF debugging sections are relative to the beginning* of the section so we begin them at 0.  *//* DWARF 1 */.debug          0 : { *(.debug) }.line           0 : { *(.line) }/* GNU DWARF 1 extensions */.debug_srcinfo  0 : { *(.debug_srcinfo) }.debug_sfnames  0 : { *(.debug_sfnames) }/* DWARF 1.1 and DWARF 2 */.debug_aranges  0 : { *(.debug_aranges) }.debug_pubnames 0 : { *(.debug_pubnames) }/* DWARF 2 */.debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }.debug_abbrev   0 : { *(.debug_abbrev) }.debug_line     0 : { *(.debug_line) }.debug_frame    0 : { *(.debug_frame) }.debug_str      0 : { *(.debug_str) }.debug_loc      0 : { *(.debug_loc) }.debug_macinfo  0 : { *(.debug_macinfo) }/* SGI/MIPS DWARF 2 extensions */.debug_weaknames 0 : { *(.debug_weaknames) }.debug_funcnames 0 : { *(.debug_funcnames) }.debug_typenames 0 : { *(.debug_typenames) }.debug_varnames  0 : { *(.debug_varnames) }
}

main.c，最小例程里边带了LED闪烁功能

/** Copyright (c) 2006-2025 RT-Thread Development Team** SPDX-License-Identifier: Apache-2.0** Change Logs:* Date           Author       Notes* 2025-3-17      hywing       first version*/#include <board.h>
#include <rtthread.h>
#ifndef RT_USING_NANO
#include <rtdevice.h>
#endif /* RT_USING_NANO *//* defined the LED0 pin: PB4 */
#define LED0_PIN    GET_PIN(B, 4)int main(void)
{/* set LED0 pin mode to output */rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);rt_kprintf("Welcome to the world of IoT Stuff!\r\n");while (1){rt_pin_write(LED0_PIN, PIN_HIGH);rt_thread_mdelay(500);rt_pin_write(LED0_PIN, PIN_LOW);rt_thread_mdelay(500);}return RT_EOK;
}

工程模板

我们先把Template工程配置好，然后后面就可以通过scons自动生成想要的工程配置，打开Template工程模板选择STM32G030C8TX

时钟配置为16MHz，检查IROM1和IRAM1的起始地址以及大小是否正确

下载器配置为ST-Link Debugger

ST-Link Debug配置，Clock Req设为10MHz

Flash Download配置

Include Paths调整：拷贝过来的例程有些是不对的，需要修正过来

导出MDK Keil5工程

scons --target=mdk5

导出的rtconfig.h文件配置如下

#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__#define SOC_STM32G030RB
#define BOARD_STM32G030_TINY_BOARD/* RT-Thread Kernel *//* klibc options *//* rt_vsnprintf options */#define RT_KLIBC_USING_LIBC_VSNPRINTF
/* end of rt_vsnprintf options *//* rt_vsscanf options */#define RT_KLIBC_USING_LIBC_VSSCANF
/* end of rt_vsscanf options *//* rt_memset options *//* end of rt_memset options *//* rt_memcpy options *//* end of rt_memcpy options *//* rt_memmove options *//* end of rt_memmove options *//* rt_memcmp options *//* end of rt_memcmp options *//* rt_strstr options *//* end of rt_strstr options *//* rt_strcasecmp options *//* end of rt_strcasecmp options *//* rt_strncpy options *//* end of rt_strncpy options *//* rt_strcpy options *//* end of rt_strcpy options *//* rt_strncmp options *//* end of rt_strncmp options *//* rt_strcmp options *//* end of rt_strcmp options *//* rt_strlen options *//* end of rt_strlen options *//* rt_strnlen options *//* end of rt_strnlen options */
/* end of klibc options */
#define RT_NAME_MAX 8
#define RT_CPUS_NR 1
#define RT_ALIGN_SIZE 8
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256/* kservice options *//* end of kservice options */
#define RT_USING_DEBUG
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT/* Inter-Thread communication */#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* end of Inter-Thread communication *//* Memory Management */#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
/* end of Memory Management */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50200
#define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M0/* RT-Thread Components */#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 1024
#define RT_MAIN_THREAD_PRIORITY 10
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 768
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
#define FINSH_USING_OPTION_COMPLETION/* DFS: device virtual file system *//* end of DFS: device virtual file system *//* Device Drivers */#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* end of Device Drivers *//* C/C++ and POSIX layer *//* ISO-ANSI C layer *//* Timezone and Daylight Saving Time */#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* end of Timezone and Daylight Saving Time */
/* end of ISO-ANSI C layer *//* POSIX (Portable Operating System Interface) layer *//* Interprocess Communication (IPC) *//* Socket is in the 'Network' category *//* end of Interprocess Communication (IPC) */
/* end of POSIX (Portable Operating System Interface) layer */
/* end of C/C++ and POSIX layer *//* Network *//* end of Network *//* Memory protection *//* end of Memory protection *//* Utilities *//* end of Utilities *//* Using USB legacy version *//* end of Using USB legacy version */
/* end of RT-Thread Components *//* RT-Thread Utestcases *//* end of RT-Thread Utestcases *//* RT-Thread online packages *//* IoT - internet of things *//* Wi-Fi *//* Marvell WiFi *//* end of Marvell WiFi *//* Wiced WiFi *//* end of Wiced WiFi *//* CYW43012 WiFi *//* end of CYW43012 WiFi *//* BL808 WiFi *//* end of BL808 WiFi *//* CYW43439 WiFi *//* end of CYW43439 WiFi */
/* end of Wi-Fi *//* IoT Cloud *//* end of IoT Cloud */
/* end of IoT - internet of things *//* security packages *//* end of security packages *//* language packages *//* JSON: JavaScript Object Notation, a lightweight data-interchange format *//* end of JSON: JavaScript Object Notation, a lightweight data-interchange format *//* XML: Extensible Markup Language *//* end of XML: Extensible Markup Language */
/* end of language packages *//* multimedia packages *//* LVGL: powerful and easy-to-use embedded GUI library *//* end of LVGL: powerful and easy-to-use embedded GUI library *//* u8g2: a monochrome graphic library *//* end of u8g2: a monochrome graphic library */
/* end of multimedia packages *//* tools packages *//* end of tools packages *//* system packages *//* enhanced kernel services *//* end of enhanced kernel services *//* acceleration: Assembly language or algorithmic acceleration packages *//* end of acceleration: Assembly language or algorithmic acceleration packages *//* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard *//* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard *//* Micrium: Micrium software products porting for RT-Thread *//* end of Micrium: Micrium software products porting for RT-Thread */
/* end of system packages *//* peripheral libraries and drivers *//* HAL & SDK Drivers *//* STM32 HAL & SDK Drivers *//* end of STM32 HAL & SDK Drivers *//* Infineon HAL Packages *//* end of Infineon HAL Packages *//* Kendryte SDK *//* end of Kendryte SDK */
/* end of HAL & SDK Drivers *//* sensors drivers *//* end of sensors drivers *//* touch drivers *//* end of touch drivers */
/* end of peripheral libraries and drivers *//* AI packages *//* end of AI packages *//* Signal Processing and Control Algorithm Packages *//* end of Signal Processing and Control Algorithm Packages *//* miscellaneous packages *//* project laboratory *//* end of project laboratory *//* samples: kernel and components samples *//* end of samples: kernel and components samples *//* entertainment: terminal games and other interesting software packages *//* end of entertainment: terminal games and other interesting software packages */
/* end of miscellaneous packages *//* Arduino libraries *//* Projects and Demos *//* end of Projects and Demos *//* Sensors *//* end of Sensors *//* Display *//* end of Display *//* Timing *//* end of Timing *//* Data Processing *//* end of Data Processing *//* Data Storage *//* Communication *//* end of Communication *//* Device Control *//* end of Device Control *//* Other *//* end of Other *//* Signal IO *//* end of Signal IO *//* Uncategorized *//* end of Arduino libraries */
/* end of RT-Thread online packages */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32G0
#define BOARD_SERIES_STM32_NUCLEO_64/* Hardware Drivers Config *//* Onboard Peripheral Drivers *//* On-chip Peripheral Drivers */#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_STM32_UART_V1_TX_TIMEOUT 2000
#define BSP_USING_UART1
/* end of On-chip Peripheral Drivers *//* Board extended module Drivers *//* end of Hardware Drivers Config */#endif

遇到的问题

1. 断点失效：尽量不用Browse Information就OK

2. 没有msh提示符输出：把msh线程的栈空间大小FINSH_THREAD_STACK_SIZE调小一点就OK，512也是可以的但ps命令会卡死

#define FINSH_THREAD_STACK_SIZE 768

3. 资源紧张，SRAM比较有限，任务的堆栈尽量小一些

开源

移植的工程已经push到RT-Thread GitHub仓库：rt-thread/bsp/stm32/stm32g030-tiny-board at master · RT-Thread/rt-thread