1MHZ = 10^6 HZ

1. 系统时钟频率是168MHZ;
2. AHB1、AHB2、AHB3总线上的时钟频率是168MHz;
3. APB1总线上的时钟频率为42MHz；
4. APB2总线上的时钟频率为84MHz；

在system_stm32f4xx.c文件中查看APB1和APB2的预分频值到底是多少；

/********************************************************************************* @file    system_stm32f4xx.c* @author  MCD Application Team* @version V1.8.1* @date    27-January-2022* @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.*          This file contains the system clock configuration for STM32F4xx devices.*             * 1.  This file provides two functions and one global variable to be called from *     user application:*      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier*                      and Divider factors, AHB/APBx prescalers and Flash settings),*                      depending on the configuration made in the clock xls tool. *                      This function is called at startup just after reset and *                      before branch to main program. This call is made inside*                      the "startup_stm32f4xx.s" file.**      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used*                                  by the user application to setup the SysTick *                                  timer or configure other parameters.*                                     *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must*                                 be called whenever the core clock is changed*                                 during program execution.** 2. After each device reset the HSI (16 MHz) is used as system clock source.*    Then SystemInit() function is called, in "startup_stm32f4xx.s" file, to*    configure the system clock before to branch to main program.** 3. If the system clock source selected by user fails to startup, the SystemInit()*    function will do nothing and HSI still used as system clock source. User can *    add some code to deal with this issue inside the SetSysClock() function.** 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define*    in "stm32f4xx.h" file. When HSE is used as system clock source, directly or*    through PLL, and you are using different crystal you have to adapt the HSE*    value to your own configuration.** 5. This file configures the system clock as follows:*=============================================================================*=============================================================================*                    Supported STM32F40xxx/41xxx devices*-----------------------------------------------------------------------------*        System Clock source                    | PLL (HSE)*-----------------------------------------------------------------------------*        SYSCLK(Hz)                             | 168000000*-----------------------------------------------------------------------------*        HCLK(Hz)                               | 168000000*-----------------------------------------------------------------------------*        AHB Prescaler                          | 1*-----------------------------------------------------------------------------*        APB1 Prescaler                         | 4*-----------------------------------------------------------------------------*        APB2 Prescaler                         | 2*-----------------------------------------------------------------------------*        HSE Frequency(Hz)                      | 25000000*-----------------------------------------------------------------------------*        PLL_M                                  | 25*-----------------------------------------------------------------------------*        PLL_N                                  | 336*-----------------------------------------------------------------------------*        PLL_P                                  | 2*-----------------------------------------------------------------------------*        PLL_Q                                  | 7*-----------------------------------------------------------------------------*        PLLI2S_N                               | NA*-----------------------------------------------------------------------------*        PLLI2S_R                               | NA*-----------------------------------------------------------------------------*        I2S input clock                        | NA*-----------------------------------------------------------------------------*        VDD(V)                                 | 3.3*-----------------------------------------------------------------------------*        Main regulator output voltage          | Scale1 mode*-----------------------------------------------------------------------------*        Flash Latency(WS)                      | 5*-----------------------------------------------------------------------------*        Prefetch Buffer                        | ON*-----------------------------------------------------------------------------*        Instruction cache                      | ON*-----------------------------------------------------------------------------*        Data cache                             | ON*-----------------------------------------------------------------------------*        Require 48MHz for USB OTG FS,          | Disabled*        SDIO and RNG clock                     |*-----------------------------------------------------------------------------*=============================================================================*=============================================================================*                    Supported STM32F42xxx/43xxx devices*-----------------------------------------------------------------------------*        System Clock source                    | PLL (HSE)*-----------------------------------------------------------------------------*        SYSCLK(Hz)                             | 180000000*-----------------------------------------------------------------------------*        HCLK(Hz)                               | 180000000*-----------------------------------------------------------------------------*        AHB Prescaler                          | 1*-----------------------------------------------------------------------------*        APB1 Prescaler                         | 4*-----------------------------------------------------------------------------*        APB2 Prescaler                         | 2*-----------------------------------------------------------------------------*        HSE Frequency(Hz)                      | 25000000*-----------------------------------------------------------------------------*        PLL_M                                  | 25*-----------------------------------------------------------------------------*        PLL_N                                  | 360*-----------------------------------------------------------------------------*        PLL_P                                  | 2*-----------------------------------------------------------------------------*        PLL_Q                                  | 7*-----------------------------------------------------------------------------*        PLLI2S_N                               | NA*-----------------------------------------------------------------------------*        PLLI2S_R                               | NA*-----------------------------------------------------------------------------*        I2S input clock                        | NA*-----------------------------------------------------------------------------*        VDD(V)                                 | 3.3*-----------------------------------------------------------------------------*        Main regulator output voltage          | Scale1 mode*-----------------------------------------------------------------------------*        Flash Latency(WS)                      | 5*-----------------------------------------------------------------------------*        Prefetch Buffer                        | ON*-----------------------------------------------------------------------------*        Instruction cache                      | ON*-----------------------------------------------------------------------------*        Data cache                             | ON*-----------------------------------------------------------------------------*        Require 48MHz for USB OTG FS,          | Disabled*        SDIO and RNG clock                     |*-----------------------------------------------------------------------------*=============================================================================*=============================================================================*                         Supported STM32F401xx devices*-----------------------------------------------------------------------------*        System Clock source                    | PLL (HSE)*-----------------------------------------------------------------------------*        SYSCLK(Hz)                             | 84000000*-----------------------------------------------------------------------------*        HCLK(Hz)                               | 84000000*-----------------------------------------------------------------------------*        AHB Prescaler                          | 1*-----------------------------------------------------------------------------*        APB1 Prescaler                         | 2*-----------------------------------------------------------------------------*        APB2 Prescaler                         | 1*-----------------------------------------------------------------------------*        HSE Frequency(Hz)                      | 25000000*-----------------------------------------------------------------------------*        PLL_M                                  | 25*-----------------------------------------------------------------------------*        PLL_N                                  | 336*-----------------------------------------------------------------------------*        PLL_P                                  | 4*-----------------------------------------------------------------------------*        PLL_Q                                  | 7*-----------------------------------------------------------------------------*        PLLI2S_N                               | NA*-----------------------------------------------------------------------------*        PLLI2S_R                               | NA*-----------------------------------------------------------------------------*        I2S input clock                        | NA*-----------------------------------------------------------------------------*        VDD(V)                                 | 3.3*-----------------------------------------------------------------------------*        Main regulator output voltage          | Scale1 mode*-----------------------------------------------------------------------------*        Flash Latency(WS)                      | 2*-----------------------------------------------------------------------------*        Prefetch Buffer                        | ON*-----------------------------------------------------------------------------*        Instruction cache                      | ON*-----------------------------------------------------------------------------*        Data cache                             | ON*-----------------------------------------------------------------------------*        Require 48MHz for USB OTG FS,          | Disabled*        SDIO and RNG clock                     |*-----------------------------------------------------------------------------*=============================================================================*=============================================================================*                Supported STM32F411xx/STM32F410xx devices*-----------------------------------------------------------------------------*        System Clock source                    | PLL (HSI)*-----------------------------------------------------------------------------*        SYSCLK(Hz)                             | 100000000*-----------------------------------------------------------------------------*        HCLK(Hz)                               | 100000000*-----------------------------------------------------------------------------*        AHB Prescaler                          | 1*-----------------------------------------------------------------------------*        APB1 Prescaler                         | 2*-----------------------------------------------------------------------------*        APB2 Prescaler                         | 1*-----------------------------------------------------------------------------*        HSI Frequency(Hz)                      | 16000000*-----------------------------------------------------------------------------*        PLL_M                                  | 16*-----------------------------------------------------------------------------*        PLL_N                                  | 400*-----------------------------------------------------------------------------*        PLL_P                                  | 4*-----------------------------------------------------------------------------*        PLL_Q                                  | 7*-----------------------------------------------------------------------------*        PLLI2S_N                               | NA*-----------------------------------------------------------------------------*        PLLI2S_R                               | NA*-----------------------------------------------------------------------------*        I2S input clock                        | NA*-----------------------------------------------------------------------------*        VDD(V)                                 | 3.3*-----------------------------------------------------------------------------*        Main regulator output voltage          | Scale1 mode*-----------------------------------------------------------------------------*        Flash Latency(WS)                      | 3*-----------------------------------------------------------------------------*        Prefetch Buffer                        | ON*-----------------------------------------------------------------------------*        Instruction cache                      | ON*-----------------------------------------------------------------------------*        Data cache                             | ON*-----------------------------------------------------------------------------*        Require 48MHz for USB OTG FS,          | Disabled*        SDIO and RNG clock                     |*-----------------------------------------------------------------------------*=============================================================================*=============================================================================*                         Supported STM32F446xx devices*-----------------------------------------------------------------------------*        System Clock source                    | PLL (HSE)*-----------------------------------------------------------------------------*        SYSCLK(Hz)                             | 180000000*-----------------------------------------------------------------------------*        HCLK(Hz)                               | 180000000*-----------------------------------------------------------------------------*        AHB Prescaler                          | 1*-----------------------------------------------------------------------------*        APB1 Prescaler                         | 4*-----------------------------------------------------------------------------*        APB2 Prescaler                         | 2*-----------------------------------------------------------------------------*        HSE Frequency(Hz)                      | 8000000*-----------------------------------------------------------------------------*        PLL_M                                  | 8*-----------------------------------------------------------------------------*        PLL_N                                  | 360*-----------------------------------------------------------------------------*        PLL_P                                  | 2*-----------------------------------------------------------------------------*        PLL_Q                                  | 7*-----------------------------------------------------------------------------*        PLL_R                                  | NA*-----------------------------------------------------------------------------*        PLLI2S_M                               | NA*-----------------------------------------------------------------------------*        PLLI2S_N                               | NA*-----------------------------------------------------------------------------*        PLLI2S_P                               | NA*-----------------------------------------------------------------------------*        PLLI2S_Q                               | NA*-----------------------------------------------------------------------------*        PLLI2S_R                               | NA*-----------------------------------------------------------------------------*        I2S input clock                        | NA*-----------------------------------------------------------------------------*        VDD(V)                                 | 3.3*-----------------------------------------------------------------------------*        Main regulator output voltage          | Scale1 mode*-----------------------------------------------------------------------------*        Flash Latency(WS)                      | 5*-----------------------------------------------------------------------------*        Prefetch Buffer                        | ON*-----------------------------------------------------------------------------*        Instruction cache                      | ON*-----------------------------------------------------------------------------*        Data cache                             | ON*-----------------------------------------------------------------------------*        Require 48MHz for USB OTG FS,          | Disabled*        SDIO and RNG clock                     |*-----------------------------------------------------------------------------*=============================================================================******************************************************************************* @attention** Copyright (c) 2016 STMicroelectronics.* All rights reserved.** This software is licensed under terms that can be found in the LICENSE file* in the root directory of this software component.* If no LICENSE file comes with this software, it is provided AS-IS.********************************************************************************/