为了开发方便,ST 官方为 STM32F103 编写了一个叫做 stm32f10x.h 的文件,在这个文件里面定义了 STM32F103 所有外设寄存器。而有些芯片是没有这种寄存器库的,在没有的情况下要学会自己建立一个寄存器库。NXP 官方并没有为 I.MX6UL 编写类似 stm32f10x.h 这样的文件,本章将参考 stm32f10x.h 来编写一个简单的 MCIMX6Y2.h 文件。
1、 I.MX6U 寄存器定义
参考 STM32 的官方文件来编写 I.MX6U 的寄存器定义,比如GPIO组的八个寄存器,步骤如下:
(1)、编写外设结构体
先将同属于一个外设的所有寄存器编写到一个结构体里面,如 GPIO寄存器的结构如下:
/* * GPIO寄存器结构体*/
typedef struct
{volatile unsigned int DR; volatile unsigned int GDIR; volatile unsigned int PSR; volatile unsigned int ICR1; volatile unsigned int ICR2; volatile unsigned int IMR; volatile unsigned int ISR; volatile unsigned int EDGE_SEL;
}GPIO_Type;
上述结构体GPIO_Type就是 GPIO 寄存器,成员变量分别是DR、GDIR、PSR、ICR1、ICR2、EDGE_SEL、IMR 和 ISR寄存器,每个寄存器的地址是 32 位,每个成员都使用“volatile”进行了修饰,目的是防止编译器优化。
(2)、定义寄存器组的基地址
根据结构体 GPIO_Type的定义,其第一个成员变量为DR,也就是 DR寄存器,I.MX6U 一共有
GPIO1~GPIO5 共五组 GPIO,查找 I.MX6U 的参考手册可以得知不同的GPIO1的地址也不相同,因此需要根据不同的GPIO来进行定义,定义如下:
#define GPIO1_BASE (0x0209C000)
#define GPIO2_BASE (0x020A0000)
#define GPIO3_BASE (0x020A4000)
#define GPIO4_BASE (0x020A8000)
#define GPIO5_BASE (0x020AC000)
(3)、定义访问指针
访问指针定义如下:
#define GPIO1 ((GPIO_Type *)GPIO1_BASE)
#define GPIO2 ((GPIO_Type *)GPIO2_BASE)
#define GPIO3 ((GPIO_Type *)GPIO3_BASE)
#define GPIO4 ((GPIO_Type *)GPIO4_BASE)
#define GPIO5 ((GPIO_Type *)GPIO5_BASE)
通过上面三步我们就可以通过“GPIO1->DR”来访问 GPIO1的DR寄存器了。同样的,其他的外设寄存器都可以通过这三步来定义。
2、 硬件原理分析
可以看出,LED0 接到了 GPIO_3 上,GPIO_3 就是 GPIO1_IO03,当 GPIO1_IO03输出低电平(0)的时候发光二极管 LED0 就会导通点亮,当 GPIO1_IO03 输出高电平(1)的时候发光二极管 LED0 不会导通,因此 LED0 也就不会点亮。所以 LED0 的亮灭取决于 GPIO1_IO03的输出电平,输出 0 就亮,输出 1 就灭。
3、实验程序编写
创建名字“ledc_stm32”的文件夹,新建三个文件:start.S、main.c 和 imx6ul.h。其中 start.S 是汇编文件,start.S 文件的内容和第6章的 start.S 一样,直接复制过来就可以main.c 和 imx6ul.h 是 C 文件。
文件 imx6ul.h 用来存放外设寄存器定义,在 imx6ul.h 中输入如下代码:
/* * 外设寄存器组的基地址 */
#define CCM_BASE (0X020C4000)
#define CCM_ANALOG_BASE (0X020C8000)
#define IOMUX_SW_MUX_BASE (0X020E0014)
#define IOMUX_SW_PAD_BASE (0X020E0204)
#define GPIO1_BASE (0x0209C000)
#define GPIO2_BASE (0x020A0000)
#define GPIO3_BASE (0x020A4000)
#define GPIO4_BASE (0x020A8000)
#define GPIO5_BASE (0x020AC000)/* * CCM寄存器结构体定义,分为CCM和CCM_ANALOG */
typedef struct
{volatile unsigned int CCR;volatile unsigned int CCDR;volatile unsigned int CSR;volatile unsigned int CCSR;volatile unsigned int CACRR;volatile unsigned int CBCDR;volatile unsigned int CBCMR;volatile unsigned int CSCMR1;volatile unsigned int CSCMR2;volatile unsigned int CSCDR1;volatile unsigned int CS1CDR;volatile unsigned int CS2CDR;volatile unsigned int CDCDR;volatile unsigned int CHSCCDR;volatile unsigned int CSCDR2;volatile unsigned int CSCDR3;volatile unsigned int CCGR4;volatile unsigned int CCGR5;volatile unsigned int CCGR6;volatile unsigned int RESERVED_3[1];volatile unsigned int CMEOR;
} CCM_Type; typedef struct
{volatile unsigned int PLL_ARM;volatile unsigned int PLL_ARM_SET;volatile unsigned int PLL_ARM_CLR;volatile unsigned int PLL_ARM_TOG;volatile unsigned int PLL_USB1;volatile unsigned int PLL_USB1_SET;volatile unsigned int PLL_USB1_CLR;volatile unsigned int PLL_USB1_TOG;volatile unsigned int PLL_USB2;volatile unsigned int PLL_USB2_SET;volatile unsigned int PLL_USB2_CLR;volatile unsigned int PLL_USB2_TOG;volatile unsigned int PLL_SYS;volatile unsigned int PLL_SYS_SET;volatile unsigned int PLL_SYS_CLR;volatile unsigned int PLL_SYS_TOG;volatile unsigned int PLL_SYS_SS;volatile unsigned int RESERVED_1[3];volatile unsigned int PLL_SYS_NUM;volatile unsigned int RESERVED_2[3];volatile unsigned int PLL_SYS_DENOM; volatile unsigned int RESERVED_3[3];volatile unsigned int PLL_AUDIO;volatile unsigned int PLL_AUDIO_SET;volatile unsigned int PLL_AUDIO_CLR;volatile unsigned int PLL_AUDIO_TOG;volatile unsigned int PLL_AUDIO_DENOM;volatile unsigned int RESERVED_4[3];volatile unsigned int PLL_VIDEO;volatile unsigned int PLL_VIDEO_SET;volatile unsigned int PLL_VIDEO_CLR;volatile unsigned int PLL_VIDEO_TOG;volatile unsigned int PLL_VIDEO_NUM;volatile unsigned int RESERVED_5[3];volatile unsigned int PLL_VIDEO_DENOM;volatile unsigned int RESERVED_6[7];volatile unsigned int PLL_ENET;volatile unsigned int PLL_ENET_SET;volatile unsigned int PLL_ENET_CLR;volatile unsigned int PLL_ENET_TOG;volatile unsigned int PFD_480;volatile unsigned int PFD_480_SET;volatile unsigned int PFD_480_CLR;volatile unsigned int PFD_480_TOG;volatile unsigned int PFD_528;volatile unsigned int PFD_528_SET;volatile unsigned int PFD_528_CLR;volatile unsigned int PFD_528_TOG;volatile unsigned int RESERVED_7[16];volatile unsigned int MISC0;volatile unsigned int MISC0_SET;volatile unsigned int MISC0_CLR;volatile unsigned int MISC0_TOG;volatile unsigned int MISC1;volatile unsigned int MISC1_SET;volatile unsigned int MISC1_CLR;volatile unsigned int MISC1_TOG;volatile unsigned int MISC2;volatile unsigned int MISC2_SET;volatile unsigned int MISC2_CLR;volatile unsigned int MISC2_TOG;
} CCM_ANALOG_Type; /* * IOMUX寄存器组*/
typedef struct
{volatile unsigned int BOOT_MODE0;volatile unsigned int BOOT_MODE1;volatile unsigned int SNVS_TAMPER0;volatile unsigned int SNVS_TAMPER1;volatile unsigned int SNVS_TAMPER2;volatile unsigned int SNVS_TAMPER3;volatile unsigned int SNVS_TAMPER4;volatile unsigned int SNVS_TAMPER5;volatile unsigned int SNVS_TAMPER6;volatile unsigned int SNVS_TAMPER7;volatile unsigned int SNVS_TAMPER8;volatile unsigned int SNVS_TAMPER9;volatile unsigned int JTAG_MOD;volatile unsigned int JTAG_TMS;volatile unsigned int JTAG_TDO;volatile unsigned int JTAG_TDI;volatile unsigned int JTAG_TCK;volatile unsigned int JTAG_TRST_B;volatile unsigned int GPIO1_IO00;volatile unsigned int GPIO1_IO01;volatile unsigned int GPIO1_IO02;volatile unsigned int GPIO1_IO03;volatile unsigned int GPIO1_IO04;volatile unsigned int GPIO1_IO05;volatile unsigned int GPIO1_IO06;volatile unsigned int GPIO1_IO07;volatile unsigned int GPIO1_IO08;volatile unsigned int GPIO1_IO09;volatile unsigned int UART1_TX_DATA;volatile unsigned int UART1_RX_DATA;volatile unsigned int UART1_CTS_B;volatile unsigned int UART1_RTS_B;volatile unsigned int UART2_TX_DATA;volatile unsigned int UART2_RX_DATA;volatile unsigned int UART2_CTS_B;volatile unsigned int UART2_RTS_B;volatile unsigned int UART3_TX_DATA;volatile unsigned int UART3_RX_DATA;volatile unsigned int UART3_CTS_B;volatile unsigned int UART3_RTS_B;volatile unsigned int UART4_TX_DATA;volatile unsigned int UART4_RX_DATA;volatile unsigned int UART5_TX_DATA;volatile unsigned int UART5_RX_DATA;volatile unsigned int ENET1_RX_DATA0;volatile unsigned int ENET1_RX_DATA1;volatile unsigned int ENET1_RX_EN;volatile unsigned int ENET1_TX_DATA0;volatile unsigned int ENET1_TX_DATA1;volatile unsigned int ENET1_TX_EN;volatile unsigned int ENET1_TX_CLK;volatile unsigned int ENET1_RX_ER;volatile unsigned int ENET2_RX_DATA0;volatile unsigned int ENET2_RX_DATA1;volatile unsigned int ENET2_RX_EN;volatile unsigned int ENET2_TX_DATA0;volatile unsigned int ENET2_TX_DATA1;volatile unsigned int ENET2_TX_EN;volatile unsigned int ENET2_TX_CLK;volatile unsigned int ENET2_RX_ER;volatile unsigned int LCD_CLK;volatile unsigned int LCD_ENABLE;volatile unsigned int LCD_HSYNC;volatile unsigned int LCD_VSYNC;volatile unsigned int LCD_RESET;volatile unsigned int LCD_DATA00;volatile unsigned int LCD_DATA01;volatile unsigned int LCD_DATA02;volatile unsigned int LCD_DATA03;volatile unsigned int LCD_DATA04;volatile unsigned int LCD_DATA05;volatile unsigned int LCD_DATA06;volatile unsigned int LCD_DATA07;volatile unsigned int LCD_DATA08;volatile unsigned int LCD_DATA09;volatile unsigned int LCD_DATA10;volatile unsigned int LCD_DATA11;volatile unsigned int LCD_DATA12;volatile unsigned int LCD_DATA13;volatile unsigned int LCD_DATA14;volatile unsigned int LCD_DATA15;volatile unsigned int LCD_DATA16;volatile unsigned int LCD_DATA17;volatile unsigned int LCD_DATA18;volatile unsigned int LCD_DATA19;volatile unsigned int LCD_DATA20;volatile unsigned int LCD_DATA21;volatile unsigned int LCD_DATA22;volatile unsigned int LCD_DATA23;volatile unsigned int NAND_RE_B;volatile unsigned int NAND_WE_B;volatile unsigned int NAND_DATA00;volatile unsigned int NAND_DATA01;volatile unsigned int NAND_DATA02;volatile unsigned int NAND_DATA03;volatile unsigned int NAND_DATA04;volatile unsigned int NAND_DATA05;volatile unsigned int NAND_DATA06;volatile unsigned int NAND_DATA07;volatile unsigned int NAND_ALE;volatile unsigned int NAND_WP_B;volatile unsigned int NAND_READY_B;volatile unsigned int NAND_CE0_B;volatile unsigned int NAND_CE1_B;volatile unsigned int NAND_CLE;volatile unsigned int NAND_DQS;volatile unsigned int SD1_CMD;volatile unsigned int SD1_CLK;volatile unsigned int SD1_DATA0;volatile unsigned int SD1_DATA1;volatile unsigned int SD1_DATA2;volatile unsigned int SD1_DATA3;volatile unsigned int CSI_MCLK;volatile unsigned int CSI_PIXCLK;volatile unsigned int CSI_VSYNC;volatile unsigned int CSI_HSYNC;volatile unsigned int CSI_DATA00;volatile unsigned int CSI_DATA01;volatile unsigned int CSI_DATA02;volatile unsigned int CSI_DATA03;volatile unsigned int CSI_DATA04;volatile unsigned int CSI_DATA05;volatile unsigned int CSI_DATA06;volatile unsigned int CSI_DATA07;
}IOMUX_SW_MUX_Type;typedef struct
{volatile unsigned int DRAM_ADDR00;volatile unsigned int DRAM_ADDR01;volatile unsigned int DRAM_ADDR02;volatile unsigned int DRAM_ADDR03;volatile unsigned int DRAM_ADDR04;volatile unsigned int DRAM_ADDR05;volatile unsigned int DRAM_ADDR06;volatile unsigned int DRAM_ADDR07;volatile unsigned int DRAM_ADDR08;volatile unsigned int DRAM_ADDR09;volatile unsigned int DRAM_ADDR10;volatile unsigned int DRAM_ADDR11;volatile unsigned int DRAM_ADDR12;volatile unsigned int DRAM_ADDR13;volatile unsigned int DRAM_ADDR14;volatile unsigned int DRAM_ADDR15;volatile unsigned int DRAM_DQM0;volatile unsigned int DRAM_DQM1;volatile unsigned int DRAM_RAS_B;volatile unsigned int DRAM_CAS_B;volatile unsigned int DRAM_CS0_B;volatile unsigned int DRAM_CS1_B;volatile unsigned int DRAM_SDWE_B;volatile unsigned int DRAM_ODT0;volatile unsigned int DRAM_ODT1;volatile unsigned int DRAM_SDBA0;volatile unsigned int DRAM_SDBA1;volatile unsigned int DRAM_SDBA2;volatile unsigned int DRAM_SDCKE0;volatile unsigned int DRAM_SDCKE1;volatile unsigned int DRAM_SDCLK0_P;volatile unsigned int DRAM_SDQS0_P;volatile unsigned int DRAM_SDQS1_P;volatile unsigned int DRAM_RESET;volatile unsigned int TEST_MODE;volatile unsigned int POR_B;volatile unsigned int ONOFF;volatile unsigned int SNVS_PMIC_ON_REQ;volatile unsigned int CCM_PMIC_STBY_REQ;volatile unsigned int BOOT_MODE0;volatile unsigned int BOOT_MODE1;volatile unsigned int SNVS_TAMPER0;volatile unsigned int SNVS_TAMPER1;volatile unsigned int SNVS_TAMPER2;volatile unsigned int SNVS_TAMPER3;volatile unsigned int SNVS_TAMPER4;volatile unsigned int SNVS_TAMPER5;volatile unsigned int SNVS_TAMPER6;volatile unsigned int SNVS_TAMPER7;volatile unsigned int SNVS_TAMPER8;volatile unsigned int SNVS_TAMPER9;volatile unsigned int JTAG_MOD;volatile unsigned int JTAG_TMS;volatile unsigned int JTAG_TDO;volatile unsigned int JTAG_TDI;volatile unsigned int JTAG_TCK;volatile unsigned int JTAG_TRST_B;volatile unsigned int GPIO1_IO00;volatile unsigned int GPIO1_IO01;volatile unsigned int GPIO1_IO02;volatile unsigned int GPIO1_IO03;volatile unsigned int GPIO1_IO04;volatile unsigned int GPIO1_IO05;volatile unsigned int GPIO1_IO06;volatile unsigned int GPIO1_IO07;volatile unsigned int GPIO1_IO08;volatile unsigned int GPIO1_IO09;volatile unsigned int UART1_TX_DATA;volatile unsigned int UART1_RX_DATA;volatile unsigned int UART1_CTS_B;volatile unsigned int UART1_RTS_B;volatile unsigned int UART2_TX_DATA;volatile unsigned int UART2_RX_DATA;volatile unsigned int UART2_CTS_B;volatile unsigned int UART2_RTS_B;volatile unsigned int UART3_TX_DATA;volatile unsigned int UART3_RX_DATA;volatile unsigned int UART3_CTS_B;volatile unsigned int UART3_RTS_B;volatile unsigned int UART4_TX_DATA;volatile unsigned int UART4_RX_DATA;volatile unsigned int UART5_TX_DATA;volatile unsigned int UART5_RX_DATA;volatile unsigned int ENET1_RX_DATA0;volatile unsigned int ENET1_RX_DATA1;volatile unsigned int ENET1_RX_EN;volatile unsigned int ENET1_TX_DATA0;volatile unsigned int ENET1_TX_DATA1;volatile unsigned int ENET1_TX_EN;volatile unsigned int ENET1_TX_CLK;volatile unsigned int ENET1_RX_ER;volatile unsigned int ENET2_RX_DATA0;volatile unsigned int ENET2_RX_DATA1;volatile unsigned int ENET2_RX_EN;volatile unsigned int ENET2_TX_DATA0;volatile unsigned int ENET2_TX_DATA1;volatile unsigned int ENET2_TX_EN;volatile unsigned int ENET2_TX_CLK;volatile unsigned int ENET2_RX_ER;volatile unsigned int LCD_CLK;volatile unsigned int LCD_ENABLE;volatile unsigned int LCD_HSYNC;volatile unsigned int LCD_VSYNC;volatile unsigned int LCD_RESET;volatile unsigned int LCD_DATA00;volatile unsigned int LCD_DATA01;volatile unsigned int LCD_DATA02;volatile unsigned int LCD_DATA03;volatile unsigned int LCD_DATA04;volatile unsigned int LCD_DATA05;volatile unsigned int LCD_DATA06;volatile unsigned int LCD_DATA07;volatile unsigned int LCD_DATA08;volatile unsigned int LCD_DATA09;volatile unsigned int LCD_DATA10;volatile unsigned int LCD_DATA11;volatile unsigned int LCD_DATA12;volatile unsigned int LCD_DATA13;volatile unsigned int LCD_DATA14;volatile unsigned int LCD_DATA15;volatile unsigned int LCD_DATA16;volatile unsigned int LCD_DATA17;volatile unsigned int LCD_DATA18;volatile unsigned int LCD_DATA19;volatile unsigned int LCD_DATA20;volatile unsigned int LCD_DATA21;volatile unsigned int LCD_DATA22;volatile unsigned int LCD_DATA23;volatile unsigned int NAND_RE_B;volatile unsigned int NAND_WE_B;volatile unsigned int NAND_DATA00;volatile unsigned int NAND_DATA01;volatile unsigned int NAND_DATA02;volatile unsigned int NAND_DATA03;volatile unsigned int NAND_DATA04;volatile unsigned int NAND_DATA05;volatile unsigned int NAND_DATA06;volatile unsigned int NAND_DATA07;volatile unsigned int NAND_ALE;volatile unsigned int NAND_WP_B;volatile unsigned int NAND_READY_B;volatile unsigned int NAND_CE0_B;volatile unsigned int NAND_CE1_B;volatile unsigned int NAND_CLE;volatile unsigned int NAND_DQS;volatile unsigned int SD1_CMD;volatile unsigned int SD1_CLK;volatile unsigned int SD1_DATA0;volatile unsigned int SD1_DATA1;volatile unsigned int SD1_DATA2;volatile unsigned int SD1_DATA3;volatile unsigned int CSI_MCLK;volatile unsigned int CSI_PIXCLK;volatile unsigned int CSI_VSYNC;volatile unsigned int CSI_HSYNC;volatile unsigned int CSI_DATA00;volatile unsigned int CSI_DATA01;volatile unsigned int CSI_DATA02;volatile unsigned int CSI_DATA03;volatile unsigned int CSI_DATA04;volatile unsigned int CSI_DATA05;volatile unsigned int CSI_DATA06;volatile unsigned int CSI_DATA07;volatile unsigned int GRP_ADDDS;volatile unsigned int GRP_DDRMODE_CTL;volatile unsigned int GRP_B0DS;volatile unsigned int GRP_DDRPK;volatile unsigned int GRP_CTLDS;volatile unsigned int GRP_B1DS;volatile unsigned int GRP_DDRHYS;volatile unsigned int GRP_DDRPKE;volatile unsigned int GRP_DDRMODE;volatile unsigned int GRP_DDR_TYPE;
}IOMUX_SW_PAD_Type;/* * GPIO寄存器结构体*/
typedef struct
{volatile unsigned int DR; volatile unsigned int GDIR; volatile unsigned int PSR; volatile unsigned int ICR1; volatile unsigned int ICR2; volatile unsigned int IMR; volatile unsigned int ISR; volatile unsigned int EDGE_SEL;
}GPIO_Type;/* * 外设指针 */
#define CCM ((CCM_Type *)CCM_BASE)
#define CCM_ANALOG ((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
#define IOMUX_SW_MUX ((IOMUX_SW_MUX_Type *)IOMUX_SW_MUX_BASE)
#define IOMUX_SW_PAD ((IOMUX_SW_PAD_Type *)IOMUX_SW_PAD_BASE)
#define GPIO1 ((GPIO_Type *)GPIO1_BASE)
#define GPIO2 ((GPIO_Type *)GPIO2_BASE)
#define GPIO3 ((GPIO_Type *)GPIO3_BASE)
#define GPIO4 ((GPIO_Type *)GPIO4_BASE)
#define GPIO5 ((GPIO_Type *)GPIO5_BASE)
在编写寄存器组结构体的时候注意寄存器的地址是否连续,有些外设的寄存器地址可能不是连续的,会有一些保留地址,因此我们需要在结构体中留出这些保留的寄存器。比如 CCM 的CCGR6 寄存器地址为 0X020C4080,而寄存器 CMEOR 的地址为 0X020C4088。按照地址顺序递增的原理,寄存器 CMEOR 的地址应该是 0X020C4084,但是实际上 CMEOR 的地址是0X020C4088,相当于中间跳过了 0X020C4088-0X020C4080=8 个字节,如果寄存器地址连续的话应该只差 4 个字节(32 位),但是现在差了 8 个字节,所以需要在寄存器 CCGR6 和 CMEOR直接加入一个保留寄存器,如果不添加保留位来占位的话就会导致寄存器地址错位!
main.c 文件中输入如下所示内容:
#include "imx6ul.h"/** @description : 使能I.MX6U所有外设时钟* @param : 无* @return : 无*/
void clk_enable(void)
{CCM->CCGR0 = 0XFFFFFFFF;CCM->CCGR1 = 0XFFFFFFFF;CCM->CCGR2 = 0XFFFFFFFF;CCM->CCGR3 = 0XFFFFFFFF;CCM->CCGR4 = 0XFFFFFFFF;CCM->CCGR5 = 0XFFFFFFFF;CCM->CCGR6 = 0XFFFFFFFF;
}/** @description : 初始化LED对应的GPIO* @param : 无* @return : 无*/
void led_init(void)
{/* 1、初始化IO复用 */IOMUX_SW_MUX->GPIO1_IO03 = 0X5; /* 复用为GPIO1_IO03 *//* 2、配置GPIO1_IO03的IO属性 *bit 16:0 HYS关闭*bit [15:14]: 00 默认下拉*bit [13]: 0 kepper功能*bit [12]: 1 pull/keeper使能*bit [11]: 0 关闭开路输出*bit [7:6]: 10 速度100Mhz*bit [5:3]: 110 R0/6驱动能力*bit [0]: 0 低转换率*/IOMUX_SW_PAD->GPIO1_IO03 = 0X10B0;/* 3、初始化GPIO */GPIO1->GDIR = 0X0000008; /* GPIO1_IO03设置为输出 *//* 4、设置GPIO1_IO03输出低电平,打开LED0 */ GPIO1->DR &= ~(1 << 3); }/** @description : 打开LED灯* @param : 无* @return : 无*/
void led_on(void)
{/* 将GPIO1_DR的bit3清零 */GPIO1->DR &= ~(1<<3);
}/** @description : 关闭LED灯* @param : 无* @return : 无*/
void led_off(void)
{/* 将GPIO1_DR的bit3置1 */GPIO1->DR |= (1<<3);
}/** @description : 短时间延时函数* @param - n : 要延时循环次数(空操作循环次数,模式延时)* @return : 无*/
void delay_short(volatile unsigned int n)
{while(n--){}
}/** @description : 延时函数,在396Mhz的主频下* 延时时间大约为1ms* @param - n : 要延时的ms数* @return : 无*/
void delay(volatile unsigned int n)
{while(n--){delay_short(0x7ff);}
}/** @description : mian函数* @param : 无* @return : 无*/
int main(void)
{clk_enable(); /* 使能所有的时钟 */led_init(); /* 初始化led */while(1) /* 死循环 */{ led_off(); /* 关闭LED */delay(500); /* 延时500ms */led_on(); /* 打开LED */delay(500); /* 延时500ms */}return 0;
}
main.c 中 7 个函数,这 7 个函数的含义和第十章中的 main.c 文件一样,只是函数体写法变了,寄存器的访问采用 imx6ul.h 中定义的外设指针。比如第 27 行设置 GPIO1_IO03 的复用功能就可以通过“IOMUX_SW_MUX->GPIO1_IO03”来给寄存 SW_MUX_CTL_PAD_GPIO1_IO03赋值。
4、编写 Makefile 和链接脚本
Makefile 文件的内容基本和第6章的 Makefile 一样,如下:
objs := start.o main.oledc.bin:$(objs)arm-linux-gnueabihf-ld -Timx6ul.lds -o ledc.elf $^arm-linux-gnueabihf-objcopy -O binary -S ledc.elf $@arm-linux-gnueabihf-objdump -D -m arm ledc.elf > ledc.dis%.o:%.sarm-linux-gnueabihf-gcc -Wall -nostdlib -c -O2 -o $@ $<%.o:%.Sarm-linux-gnueabihf-gcc -Wall -nostdlib -c -O2 -o $@ $<%.o:%.carm-linux-gnueabihf-gcc -Wall -nostdlib -c -O2 -o $@ $<clean:rm -rf *.o ledc.bin ledc.elf ledc.dis
链接脚本 imx6ul.lds 的内容和上一章一样,可以直接使用上一章的链接脚本文件。
5、 编译下载
利用make命令编译出ledc.bin文件,再用 imxdownload2生成可执行文件
./imxdownload2 ledc.bin
利用Win32DiskImager软件将load.img执行文件写入SD卡,SD卡插入开发板上即可正常运行。如果代码运行正常的话 LED0 就会以 500ms 的时间间隔亮灭。
6、实验代码
【免费】Linux学习笔记7-仿STM32自建寄存器库实验代码资源-CSDN文库